Our Goal The goal of System Architect is to rapidly accelerate the ability to design, prototype and experiment with adaptive instruction set architectures by providing in an integrated hardware development flow. The artifacts generated from System Architect are Chisel/Verilog HDL hardware designs, C++ cycle accurate simulators and LLVM compilers for direct compilation and simulation of target designs
	Open Source The System Architect infrastructure is released open source under an Apache-2.0 license model. System Architect makes use of a small number of external tools. All of these tools carry licenses that are compatible with Apache-2.0
	Impact System Architect provides a unique model of design to develop the hardware and compilation flow in an integrated model. Further, the entire ecosystem is provided as an open source development infrastructure